[vwbwecjl] An architecture without general purpose registers

Consider an instruction set architecture with no general-purpose registers.  Operands to instructions are specified by the memory address in the Frame Pointer (plus usually an offset).

This architecture may be implemented directly with a very fast L1 cache with no latency (essentially using a cache instead of a register file).

Or it may be JIT compiled, Transmeta-style code-morphed, or ahead of time compiled to a "real" architecture with a large general-purpose register file.  The original virtual machine target has the advantage being agnostic about the size of the target register file size.

Inspired by the Java Virtual Machine; might not be different?

This will probably work well for C, but how about other programming language calling conventions?