The LCS35 crypto-challenge puzzle makes me wonder how fast one can repeatedly square a 2048-bit integer, then take the remainder modulo a constant 2048-bit integer, if one is permitted to use custom hardware: ASIC or FPGA.
Is pipelining possible, where the next arithmetic operation begins on the partial result of the previous?
A circuit running at a measly 10 MHz would only take 91 days.
Bluespec
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